(Hong Kong)
Product Summary
The M74HC4949RM13TR is a 4 to 16 line decoder/latch with latched inputs fabricated with silicon gate C2MOS technology. A binary code stored in the four input latches (A to D) provides a high level at the selected one of sixteen outputs excluding the other fifteen outputs, when the inhibit input (INHIBIT) is held low. When the inhibit input (INHIBIT) is held high, all outputs are kept low level, while the latch function is available. The M74HC4949RM13TR applied to the data inputs are transferred to the Q outputs of latches when the strobe input is held high. When the strobe input is taken low, the information data applied to the data input at a time is retained at the output of the latches.
Parametrics
M74HC4949RM13TR absolute maximum ratings: (1)VCC Supply Voltage: -0.5V to +7 V; (2)VI DC Input Voltage: -0.5V to VCC + 0.5V; (3)VO DC Output Voltage: -0.5V to VCC + 0.5V; (4)IIK DC Input Diode Current: ±20mA; (5)IOK DC Output Diode Current: ±20mA; (6)IO DC Output Current: ±25mA; (7)ICC or IGND DC VCC or Ground Current: ±50mA; (8)PD Power Dissipation: 500mW; (9)Tstg Storage Temperature: -65℃ to +150℃; (10)TL Lead Temperature (10 sec): 300℃.
Features
M74HC4949RM13TR features: (1)high speed: tPD= 20ns (TYP.) at VCC = 6V; (2)low power dissipation: ICC = 4mA(MAX.) at TA=25℃; (3)high noise immunity: VNIH = VNIL = 28 % VCC (MIN.); (4)symmetrical output impedance: |IOH| = IOL = 4mA (MIN); (5)balanced propagation delays: tPLH @ tPHL; (6)wide operating voltage range: VCC (OPR) = 2V to 6V; (7)pin and function compatible with 74 series 4514.
Diagrams
