(Hong Kong)
Product Summary
The ep20k400cf672c7 is an FPGA. It offers the MultiCore architecture, which combines the strengths of LUT-based and product-term-based devices with an enhanced memory structure. The ep20k400cf672c7 includes additional features such as enhanced I/O standard support, CAM, additional global clocks, and enhanced ClockLock clock circuitry.
Parametrics
ep20k400cf672c7 absolute maximum ratings: (1)Operating Temperature Commercial temperature tJ: 0℃ to 85℃; (2)Operating Temperature Industrial temperature tJ: -40℃ to 100℃; (3)Speed Grade: 7; (4)tR Input rise time: 5 ns; (5)tF Input fall time: 5 ns; (6)fVCO Voltage controlled oscillator operating range: 200 to 500MHz; (7)VCCINT Supply voltage With respect to ground: –0.5 to 2.5 V; (8)VCCIO: –0.5 to 4.6 V; (9)VI DC input voltage: –0.5 to 4.6 V; (10)IOUT DC output current, per pin: –25 to 25 mA; (11)TSTG Storage temperature No bias: –65 to 150 ℃; (12)TAMB Ambient temperature Under bias: –65 to 135 ℃; (13)TJ Junction temperature: 135 ℃.
Features
ep20k400cf672c7 features: (1)Programmable logic device (PLD) manufactured using a 0.15-μm alllayer copper-metal fabrication process; (2)25 to 35% faster design performance than APEXTM 20KE devices; (3)Pin-compatible with APEX 20KE devices; (4)High-performance, low-power copper interconnect; (5)MultiCoreTM architecture integrating look-up table (LUT) logic and embedded memory; (6)LUT logic used for register-intensive functions; (7)Embedded system blocks (ESBs) used to implement memory functions, including first-in first-out (FIFO) buffers, dual-port RAM, and content-addressable memory (CAM); (8)High-density architecture; (9)200,000 to 1 million typical gates; (10)Up to 38,400 logic elements (LEs); (11)Up to 327,680 RAM bits that can be used without reducing available logic; (12)Low-power operation design: 1.8-V supply voltage; (13)Flexible clock management circuitry with up to four phase-locked loops (PLLs).
Diagrams
