TMS320C32PCM60

Product Summary

The TMS320C32PCM60 is an enhanced 32-bit floating-point processor manufactured in 0.7-um triple-level-metal CMOS technology. The enhancements to the TMS320C32PCM60 architecture include a variable-width external-memory interface, faster instruction cycle time, power-down modes, two-channel DMA coprocessor with configurable priorities, flexible boot loader, relocatable interrupt-vector table, and edge- or level-triggered interrupts.

Parametrics

TMS320C32PCM60 absolute maximum ratings: (1)Supply voltage range:–0.3 V to 7 V; (2)Input voltage range:–0.3 V to 7 V; (3)Output voltage range:–0.3 V to 7 V; (4)Continuous power dissipation: 1.95 W; (5)Operating case temperature: (PCM (commercial):0℃ to 85℃, (PCMA (extended):–40℃ to 125℃; (6)Storage temperature range:–55℃ to 150℃.

Features

TMS320C32PCM60 features: (1)32-Bit High-Performance CPU; (2)16- /32-Bit Integer and 32- /40-Bit Floating-Point Operations; (3)32-Bit Instruction Word, 24-Bit Addresses; (4)Two 256 × 32-Bit Single-Cycle, Dual-Access On-Chip RAM Blocks; (5)Flexible Boot-Program Loader; (6)144-Pin Plastic Quad Flat Package(PCM Suffix) 5 V; (7)Eight Extended-Precision Registers; (8)Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs); (9)Two Low-Power Modes; (10)Two- and Three-Operand Instructions; (11)Parallel Arithmetic Logic Unit (ALU) and Multiplier Execution in a Single Cycle; (12)Block-Repeat Capability; (13)Zero-Overhead Loops With Single-Cycle Branches; (14)Conditional Calls and Returns; (15)Interlocked Instructions for Multiprocessing Support; (16)One External Pin, PRGW, That Configures the External-Program-Memory Width to 16 or 32 Bits; (17)Two Sets of Memory Strobes (STRB0 and STRB1) and One I /O Strobe (IOSTRB) Allow Zero-Glue Logic Interface to Two Banks of Memory and One Bank of External Peripherals; (18)Separate Bus-Control Registers for Each Strobe-Control Wait-State Generation, External Memory Width, and Data Type Size.

Diagrams