(Hong Kong)
Product Summary
The gal20ra10-20lp is a High-Speed Asynchronous E2CMOS PLD. The gal20ra10-20lp combines a high performance CMOS process with electrically erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. Lattice Semiconductor’s E2CMOS circuitry achieves power levels as low as 75mA typical ICC which represents a substantial savings in power when compared to bipolar counterparts. E2 technology offers high speed (＜100ms) erase times providing the ability to reprogram, reconfigure or test the devices quickly and efficiently. The applications of the gal20ra10-20lp include State Machine Control, Standard Logic Consolidation, Multiple Clock Logic Designs.
Parametrics
gal20ra10-20lp absolute maximum ratings: (1)Supply voltage VCC: -0.5 to +7V; (2)Input voltage applied: -2.5 to VCC +1.0V; (3)Off-state output voltage applied: -2.5 to VCC +1.0V; (4)Storage Temperature: -65 to 150℃; (5)Ambient Temperature with Power Applied: -55 to 125℃.
Features
gal20ra10-20lp features: (1)high performance E2CMOS technology; (2)50% to 75% Reduction in power FROM bipolar; (3)active pull-ups on all pins; (4)E2 cell technology; (5)ten output logic macrocells; (6)preload and power-on reset of all registers; (7)electronic signature for identification.
Diagrams
