MSP430G2232IPW20R

Product Summary

The MSP430G2232IPW20R is a mixed signal microcontroller. The MSP430G2232IPW20R consists of several device featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes is optimized to achieve extended battery life in portable measurement applications. The MSP430G2232IPW20R features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 1 μs. The MSP430G2232IPW20R is an ultra-low-power mixed signal microcontroller with built-in 16-bit timer, and up to 16 I/O touch sense enabled pins and built-in communication capability using the universal serial communication interface. The MSP430G2232IPW20R has a 10-bit A/D converter. Typical applications include low-cost sensor systems that capture analog signals, convert them to digital values, and then process the data for display or for transmission to a host system.

Parametrics

MSP430G2232IPW20R absolute maximum ratings: (1)Voltage applied at VCC to VSS: –0.3 V to 4.1 V; (2)Voltage applied to any pin(2): –0.3 V to VCC + 0.3 V; (3)Diode current at any device pin: ±2 mA; (4)Storage temperature range, Tstg (3). Unprogrammed device: –55°C to 150°C; programmed device: –40°C to 85°C.

Features

MSP430G2232IPW20R features: (1)Low supply voltage range: 1.8 V to 3.6 V; (2)Ultra-low power consumption: active mode: 220 μA at 1 MHz, 2.2 V; Standby mode: 0.5 μA; Off mode (RAM retention): 0.1 μA; (3)Five power-saving modes; (4)Ultra-fast wake-up from standby mode in less than 1 μs; (5)16-Bit RISC architecture, 62.5-ns instruction cycle time; (6)Basic clock module configurations: Internal frequencies up to 16 MHz with four calibrated frequencies; Internal very-low-power low-frequency (LF)oscillator; 32-kHz crystal; External digital clock source; (7)One 16-bit timer_A with three capture/compare registers; (8)Up to 16 touch-sense enabled I/O pins.

Diagrams