Product Summary
The smj55161-80gbm is a multiport-video random-access memory (RAM). It is a high-speed, dual-port memory device. The smj55161-80gbm consists of a dynamic RAM (DRAM) module organized as 262 144 words of 16 bits each interfaced to a serial-data register (serial-access memory [SAM]) organized as 256 words of 16 bits each. The smj55161-80gbm supports three basic types of operation: random access to and from the DRAM, serial access from the serial register, and transfer of data from any row in the DRAM to the serial register. Except during transfer operations, the smj55161-80gbm can be accessed simultaneously and asynchronously from the DRAM and SAM ports. The smj55161-80gbm is equipped with several features designed to provide higher system-level bandwidth and to simplify design integration on both the DRAM and SAM ports. On the DRAM port, greater pixel-draw rates are achieved by the device’s (4 × 4) × 4 block-write feature. The block-write mode allows 16 bits of data (present in an on-chip color-data register) to be written to any combination of four adjacent column-address locations.
Parametrics
smj55161-80gbm absolute maximum ratings: (1)Supply voltage range, VCC (see Note 1): –1 V to 7 V; (2)Voltage range on any pin: –1 V to 7 V; (3)Short-circuit output current: 50 mA; (4)Power dissipation: 1.1 W; (5)Operating free-air temperature range, TA: – 55°C to 125°C; (6)Storage temperature range, Tstg: –65°C to 150°C.
Features
smj55161-80gbm features: (1)Organization: DRAM: 262 144 by 16 Bits; SAM: 256 by 16 Bits; (2)Dual-port accessibility: Simultaneous and asynchronous access from the DRAM and SAM ports; (3)Data-transfer function from the DRAM to the serial-data register; (4)(4 × 4)× 4 block-write feature for fast area-fill operations; As many as four memory-address locations written per cycle from the 16-bit On-chip color register; (5)Write-per-bit feature for selective write to each RAM I/O; Two write-per-bit modes to simplify system design; (6)Byte-write control (CASL, CASU)provides flexibility; (7)Enhanced page-mode operation for faster access.