(Hong Kong)
Product Summary
The vsc870tx serial backplane transceiver has been designed to operate with the vsc870tx serial crosspoint switch to establish a synchronous high performance switching system. The VSC870 can also connect directly to another transceiver to act as a high bandwidth backplane interconnect link. The transmitter converts a 32-bit parallel interface operating at 62.5Mb/s to a 34-bit serial data stream operating a 2.125Gb/s. The receiver converts a 34-bit serial interface operating at 2.125Gb/s to a 32-bit parallel interface operating at 62.5Mb/s. The transceiver performs automatic bit alignment, word alignment and cell alignment to a connected switch chip or another transceiver. The parallel interface has been designed with industry-standard FIFOs in mind to provide such features as automatic packet retransmission, multicast with retransmission, camp-on and support for virtual output queues. These features can also be bypassed to give the user direct control of the serial data stream. In addition, the transceiver and switch chip can operate in a early arbitration mode that greatly improves bandwidth utilization. The transceiver also contains a built-in a flow control channel and redundant serial I/O buffers.
Parametrics
vsc870tx absolute maximum ratings: (1)Power Supply Voltage (VDD)Potential to GND: -0.5V to +4V; (2)DC Input Voltage (LVDS inputs): -0.5V to VDD + 1.0V; (3)DC Input Voltage (TTL inputs): -0.5V to 5.5V; (4)DC Output Voltage (TTL outputs): -0.5V to VDD + 1.0V; (5)Output Current (TTL outputs): +/-50mA; (6)Output Current (LVDS outputs): +/-50mA; (7)Case Temperature Under Bias: -55°C to +125°C; (8)Storage Temperature: -65°Cto +150°C.
Features
vsc870tx features: (1)Performs 32-Bit Parallel to Serial and Serial to Parallel Functions; (2)Serial Data Rates are 2.0Gb/s; (3)Designed in Conjunction with the VSC880 Serial Crosspoint Switch; (4)Performs Bit Alignment, Word Alignment and Cell Alignment; (5)Three Modes of Operation: Distributed Control Packet Mode, Central Control Cell Mode and Direct Mode; (6)Support for Multicast and Multiple Input Queues; (7)Supports Priorities, Camp-on and Retransmission Capability in Packet Mode; (8)Built-in Flow Control Channel in Packet Mode; (9)Supports Cell Synchronization in Cell Mode; (10)Interfaces Directly with Industry Standard FIFOs; (11)Contains Redundant Serial I/Os and Internal Loopback Mode; (12)5V Tolerant TTL Inputs; (13)Single 3.3V Power Supply; (14)Available in 192 BGA Package.
Diagrams
