LPC2478FET208

Product Summary

NXP Semiconductors designed the LPC2478FET208 microcontroller, powered by the ARM7TDMI-S core, to be a highly integrated microcontroller for a wide range of applications that require advanced communications and high quality graphic displays. The LPC2478FET208 microcontroller has 512 kB of on-chip high-speed flash memory. This flash memory includes a special 128-bit wide memory interface and accelerator architecture that enables the CPU to execute sequential instructions from flash memory at the maximum 72 MHz system clock rate. This feature is available only on the LPC2000 ARM microcontroller family of products. The LPC2478FET208, with real-time debug interfaces that include both JTAG and embedded trace, can execute both 32-bit ARM and 16-bit Thumb instructions.

Parametrics

LPC2478FET208 absolute maximum ratings: (1)VDD(3V3)supply voltage (3.3 V)core and external rail: 3.0 to 3.6 V; (2)VDD(DCDC)(3V3)DC-to-DC converter supply voltage (3.3 V): 3.0 to 3.6 V; (3)VDDA analog 3.3 V pad supply voltage: −0.5 to +4.6 V; (4)Vi(VBAT)input voltage on pin VBAT for the RTC: −0.5 to +4.6 V; (5)Vi(VREF)input voltage on pin VREF: −0.5 to +4.6 V; (6)VIA analog input voltage on ADC related pins: −0.5 to +5.1 V; (7)IDD supply current per supply pin: 100 mA; (8)ISS ground current per ground pin: 100 mA; (9)Tstg storage temperature: −65 to +150 °C; (10)Ptot(pack)total power dissipation (per package)based on package heat transfer, not device power consumption: 1.5 W; (11)Vesd electrostatic discharge voltage human body model; all pins: −2000 to +2000 V.

Features

LPC2478FET208 features: (1)Dual Advanced High-performance Bus (AHB)system allows simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention; (2)EMC provides support for asynchronous static memory devices such as RAM, ROM; (3)and flash, as well as dynamic memories such as Single Data Rate SDRAM; (4)Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts; (5)General Purpose AHB DMA controller (GPDMA)that can be used with the SSP, I 2 S, and SD/MM interface as well as for memory-to-memory transfer SD/MMC memory card interface; (6)160 General purpose I/O pins with configurable pull-up/down resistors; (7)10-bit ADC with input multiplexing among 8 pins; (8)10-bit DAC; (9)Four general purpose timers/counters with 8 capture inputs and 10 compare outputs. Each timer block has an external count input; (10)Two PWM/timer blocks with support for three-phase motor control. Each PWM has; (11)an external count inputs.

Diagrams