Product Summary

The hyi18t512160b2f-3s is a high-speed Double-Data-Rate-Two CMOS Synchronous DRAM device, containing 1,073,741,824 bits and internally configured as anoctal quadbank DRAM. The 1-Gbit device is organized as either 32 Mbit × 4 I/O × 8 banks, 16 Mbit × 8 I/O × 8 banks or 8 Mbit × 16 I/O × 8 banks chip. The hyi18t512160b2f-3s achieves high speed transfer rates starting at 400 Mb/sec/pin for general applications.

Parametrics

HYI18T512160B2F-3S absolute maximum ratings: (1)Voltage on VDD pin relative to VSS: –1.0 to +2.3 V; (2)Voltage on VDDQ pin relative to VSS: –0.5 to +2.3 V; (3)Voltage on VDDL pin relative to VSS: –0.5 to +2.3 V; (4)Voltage on any pin relative to VSS: –0.5 to +2.3 V; (5)Storage Temperature: –55 to +100 ℃.

Features

HYI18T512160B2F-3S features: (1)Posted CAS with additive latency,; (2)Write latency = read latency - 1,; (3)Normal and weak strength data-output driver,; (4)Off-Chip Driver (OCD) impedance adjustment; (5)On-Die Termination (ODT).

Diagrams

hyi18t512160b2f-3s block diagram

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HYI18T512160B2F-3S
HYI18T512160B2F-3S

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HYI18T256800AC-3S
HYI18T256800AC-3S

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HYI18T256800AF-3.7
HYI18T256800AF-3.7

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HYI18T256800AF-3S
HYI18T256800AF-3S

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HYI18T512160B2C-3.7
HYI18T512160B2C-3.7

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HYI18T512160B2C-3S
HYI18T512160B2C-3S

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HYI18T512160B2F-3.7
HYI18T512160B2F-3.7

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